Claude Pin
16Patents
6h-index
9Co-inventors
59Inventor score
Filing activity: May 26, 1989 → Feb 3, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6516319B1 | Parallelized processing device for processing search keys based upon tree structure | Emerging Cross-Sectional Technologies | 14 | Expired |
| US5119478A | Parallel processing method and device for receiving and transmitting HDLC SDLC bit streams | Electricity | 9 | Expired |
| US6658561B1 | Hardware device for executing programmable instructions based upon micro-instructions | Physics | 7 | Expired |
| US6968386B1 | System for transferring data files between a user workstation and web server | Physics | 6 | Expired |
| US6675291B1 | Hardware device for parallel processing of any instruction within a set of instructions | Physics | 6 | Expired |
| US6341346B1 | Method for comparison between a pattern sequence and a variable length key | Physics | 6 | Expired |
| US6999994B1 | Hardware device for processing the tasks of an algorithm in parallel | Physics | 6 | Expired |
| US6426953B1 | Method of operating an internal high speed ATM bus inside a switching core | Electricity | 3 | Expired |
| US7383311B2 | Hardware device for processing the tasks of an algorithm in parallel | Physics | 3 | Expired |
| US6401188B1 | Method for selection on a pattern sequence | Electricity | 3 | Expired |
| US8190862B2 | Hardware device for processing the tasks of an algorithm in parallel | Physics | 1 | Active |
| US6219416A | Method and apparatus for processing FISU frames according to the Signalling System 7 protocol | Electricity | 1 | Expired |
| US6961337B2 | Interleaved processing system for processing frames within a network router | Emerging Cross-Sectional Technologies | 0 | Expired |
| US6547198B2 | Supporting device for a shelf of a piece of furniture or the like | Human Necessities | 0 | Expired |
| US8635620B2 | Hardware device for processing the tasks of an algorithm in parallel | Physics | 0 | Active |
| US8607031B2 | Hardware device for processing the tasks of an algorithm in parallel | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.