Charge compensation control circuit and method for use with output driver
US6661268B2 · kind B2 · utility
24Cited by
12References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2001 |
| Grant date | Dec 9, 2003 |
| Priority date | — |
| Expiry date | Dec 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output driver has an output multiplexor and an output current driver. The output multiplexor receives a data signal and outputs a q-node signal. The output current driver receives the q-node signal and drives a bus based on the q-node signal. The output multiplexor processes the data signal in various ways to generate the q-node signal. The output current driver is responsive to current control bits to select a amount of output drive current. In addition, the output multiplexor is controlled such that the output impedance of the output current driver is maintained within a predetermined range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.