Memory with trench capacitor and selection transistor and method for fabricating it

US6664167B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Dietmar Temmler · Dresden, DE
• Herbert Benzinger · Birkenfeld, DE
• Wolfram Karcher · Osterburken, DE
• Catharina Pusch · Hersbruck, DE
• Martin Schrems · Langenbruck, DE
• Jurgen Faul · Radebeul, DE

Key dates

• Filing date: Feb 28, 2002
• Grant date: Dec 16, 2003
• Expiry date: May 14, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/373

Abstract

A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.