Network for increasing transmit link layer core speed
US6665754B2 · kind B2 · utility
11Cited by
9References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2001 |
| Grant date | Dec 16, 2003 |
| Priority date | — |
| Expiry date | Jun 4, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An elastic-type first-in-first-out (FIFO) buffer network for an input/output interface to enable higher link layer clock frequencies given fixed transmit clock frequencies of these “parallel-serial” high speed link interfaces. The network is particularly applicable to interface components used in InfiniBand type hardware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.