Semiconductor device and manufacturing thereof, including a through-hole with a wider intermediate cavity
US6667551B2 · kind B2 · utility
140Cited by
5References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2001 |
| Grant date | Dec 23, 2003 |
| Priority date | — |
| Expiry date | Feb 24, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device comprises a step of forming a through-hole in a semiconductor chip having an electrode and forming a conductive layer on a region comprising an inner side of the through-hole. An intermediate portion of the through-hole is formed to be larger than an edge portion thereof, and the conductive layer is formed by electroless plating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.