Memory read/write arbitration method
US6667926B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2002 |
| Grant date | Dec 23, 2003 |
| Priority date | — |
| Expiry date | Sep 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory read/write arbitration method is disclosed. The memory read/write arbitration method, which is utilized in a memory controller for increasing row hit rate and decreasing the delay of memory access, comprises: providing a arbitrator; providing a read request fifo queue having command read requests; providing a write request fifo queue having command write requests; performing a judgment step for generating a priority, wherein the judgment step comprises: performing a first sub-judgment step to determine that a command read request of the command read requests has priority over a command write request of the command write requests, or the command write request can be forwarded to a second sub-judgment step under adaptive first-step conditions; performing the second sub-judgment step to determine the read request has priority over the command write request from the first sub-judgment step, or the command write request from the first sub-judgment has priority over the command read request. Therefore, by the memory read/write arbitration method of the present invention, the row hit rate and the bandwidth utilization of memory module are increased through the applied judgment st…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.