Apparatus and method for successively generating an event to establish a total delay time that is greater than can be expressed by specified data bits in an event memory
US6668331B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2000 |
| Grant date | Dec 23, 2003 |
| Priority date | — |
| Expiry date | Mar 24, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31921
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method in an event based test system for testing an electronics device under test (DUT). The apparatus includes an event memory for storing timing data and event type data of each event wherein the timing data of a current event is expressed by a delay time from an event immediately prior thereto with use of a specified number of data bits, and an additional delay time inserted in the timing data of a specified event in such a way to establish a total delay time of the current event which is longer than that can be expressed by the specified number of data bits in the event memory. The additional delay time is inserted by replicating the timing data and the event type data of the event immediately prior to the specified event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.