System for recovering data in a multiprocessor system comprising a conduction path for each bit between processors where the paths are grouped into separate bundles and routed along different paths
US6668335B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2000 |
| Grant date | Dec 23, 2003 |
| Priority date | — |
| Expiry date | Jul 4, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system comprising a communications link between processors configured to transmit packets between transmitting and receiving processors. The communications link comprises a conduction path for each bit in the packet and the paths are grouped into separate bundles and routed along different paths. A forwarded clock signal is sent with each bundle. The processors operate with a clock frequency that is roughly three times as fast as the clock frequency of the forwarded clock signal. Data is transmitted on both rising and falling edges of the clock. The receiving processor comprises a recovery circuit to which it pulls the asynchronous data into the processor clock domain. The recovery circuit comprises a delay locked loop circuit configured to create a delayed copy of the clock signal with clock edges that are aligned with the center of the data window for the transmitted data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.