Protective layer for a semiconductor device
US6670705B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2002 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Jun 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device comprises at least one first semiconductor layer (1-4) and a second layer (8) applied on at least a surface portion of the first layer for protecting the device. The protecting layer is of a second material having a larger energy gap between the valence band and the conduction band than a first material forming said first layer. The second material has at least in one portion of said protecting layer a nano-crystalline and amorphous structure by being composed of crystalline gains with a size less than 100 nm and a resistivity at room temperature exceeding 1×1010 &OHgr;cm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.