Low or no-force bump flattening structure and method
US6674647B2 · kind B2 · utility
47Cited by
22References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2002 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Jan 7, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
Self-aligning combination of a substrate with a chip is provided, using reverse patterns of raised recesses and raised shapes on the respective substrate and chip surfaces. High-force contact bump production is avoided. Reliable contact between a chip and substrate is achieved, with minimized skewing after chip placement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.