Memory cell with tight coupling
US6677640B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2000 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Mar 1, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
Abstract
A dielectric sandwich for use in a memory device is disclosed. The dielectric sandwich is thin and has at least one high permittivity layer having a thickness of between 140 and 240 angstroms. The dielectric sandwich also has at least one oxide layer formed at a temperature above the crystallization temperature of the high permittivity layer. In a flash memory cell the dielectric sandwich is located between the control gate and the floating gate and provides tight coupling between the control gate and the floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.