Silicon wafer with embedded optoelectronic material for monolithic OEIC
US6677655B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 1, 2001 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Nov 18, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/902
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A structure with an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 &mgr;m), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.