AMBERWAVE SYSTEMS CORPORATION
86Patents
7Active
86Granted
39Portfolio score
Filing activity: Sep 12, 1994 → Nov 26, 2007 · 7 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6995430B2 | Strained-semiconductor-on-insulator device structures | Electricity | 392 | Expired |
| US6831292B2 | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same | Emerging Cross-Sectional Technologies | 283 | Expired |
| US7074623B2 | Methods of forming strained-semiconductor-on-insulator finFET device structures | Electricity | 173 | Expired |
| US6703688B1 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | Electricity | 170 | Expired |
| US6960781B2 | Shallow trench isolation process | Electricity | 151 | Expired |
| US6555839B2 | Buried channel strained silicon FET using a supply layer created through ion implantation | Emerging Cross-Sectional Technologies | 147 | Expired |
| US5926473A | Distributed processing ethernet switch with adaptive cut-through switching | Electricity | 106 | Expired |
| US7626246B2 | Solutions for integrated circuit integration of alternative active area materials | Electricity | 103 | Active |
| US6583015B2 | Gate technology for strained surface channel and strained buried channel MOSFET devices | Electricity | 100 | Expired |
| US6900094B2 | Method of selective removal of SiGe alloys | Electricity | 96 | Expired |
| US6593191B2 | Buried channel strained silicon FET using a supply layer created through ion implantation | Emerging Cross-Sectional Technologies | 88 | Expired |
| US7109516B2 | Strained-semiconductor-on-insulator finFET device structures | Electricity | 85 | Expired |
| US7049627B2 | Semiconductor heterostructures and related methods | Electricity | 84 | Expired |
| US7420201B2 | Strained-semiconductor-on-insulator device structures with elevated source/drain regions | Electricity | 77 | Expired |
| US7335545B2 | Control of strain in device layers by prevention of relaxation | Emerging Cross-Sectional Technologies | 76 | Expired |
| US7638842B2 | Lattice-mismatched semiconductor structures on insulators | Electricity | 73 | Expired |
| US6677655B2 | Silicon wafer with embedded optoelectronic material for monolithic OEIC | Emerging Cross-Sectional Technologies | 72 | Expired |
| US6881632B2 | Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS | Electricity | 72 | Expired |
| US5521913A | Distributed processing ethernet switch with adaptive cut-through switching | Electricity | 63 | Expired |
| US6646322B2 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | Electricity | 63 | Expired |
| US6649480B2 | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs | Electricity | 62 | Expired |
| US6602613B1 | Heterointegration of materials using deposition and bonding | Emerging Cross-Sectional Technologies | 61 | Expired |
| US7307273B2 | Control of strain in device layers by selective relaxation | Electricity | 55 | Expired |
| US6677192B1 | Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits | Electricity | 53 | Expired |
| US6724008B2 | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits | Electricity | 52 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.