Method and apparatus for measuring stress in semiconductor wafers
US6678055B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2001 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Jan 3, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2831
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Integrated measurement apparatus and method for measuring layer thickness and bow in a wafer. The apparatus comprises: a monochromatic light source, a white light source, a first switch for switching between the white light source and the monochromatic light source, a plurality of optical heads for directing light from the switched light source onto different locations on a semiconductor wafer surface, a first optical processor for spectral processing of reflected light from the wafer, a second optical processor for processing of reflected light to determine an extent of bow in the wafer, and a second optical switch to switch reflected light from the wafer between the first optical processor and the second optical processor so that the white light is spectrally processed to determine layer thicknesses and the monochromatic light is processed for bowing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.