Single poly embedded eprom
US6678190B2 · kind B2 · utility
77Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2002 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | Feb 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An erasable programmable read only memory comprising two serially connected P-type metal-oxide semiconductor (MOS) transistors wherein the control gate is omitted in the structure for layout as the bias is not necessary to apply to the floating gate during the programming mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.