Memory controller with 1X/MX write capability
US6678811B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2001 |
| Grant date | Jan 13, 2004 |
| Priority date | — |
| Expiry date | May 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1689
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for writing data to memory are disclosed herein. In general, the methods and apparatus provide a memory controller with means for writing data at different rates. Data may need to be written to memory at different rates because, for example, the memory controller is used in environments where it attaches directly to a number of memory modules, and/or in environments where it attaches to a number of memory modules via an intermediary chip. The intermediary chip may, for example, comprise demultiplexers which receive data from the memory controller at twice the rate which data could be written directly to a memory module. The intermediary chip may then simultaneously transmit the demultiplexed write data to memory modules in two or more banks of memory modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.