Methods of forming and operating field effect transistors having gate and sub-gate electrodes
US6680224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2003 |
| Grant date | Jan 20, 2004 |
| Priority date | — |
| Expiry date | Mar 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Field effect transistors include a semiconductor substrate having a channel region of first conductivity type therein extending adjacent a surface thereof. Source and drain regions of second conductivity type are also provided at opposite ends of the channel region. The source and drain regions extend in the semiconductor substrate and form P-N rectifying junctions with the channel region. A gate electrode extends on the channel region and comprises a first electrically conductive material having a first work function. A first sub-gate electrode extends on the channel region and comprises a second electrically conductive material having a second work function that is unequal to the first work function. The second electrically conductive material is preferably selected so that a difference between the second work function and a work function of the channel region is sufficient to form an inversion-layer in a portion of the channel region extending opposite the first sub-gate electrode when the first sub-gate electrode is at a zero potential bias relative to the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.