High speed differential receiver
US6680626B2 · kind B2 · utility
0Cited by
7References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2002 |
| Grant date | Jan 20, 2004 |
| Priority date | — |
| Expiry date | Jun 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/2481
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential receiver having a pair of cross-coupled signal conditioning devices improves transition time and data signal integrity. In an embodiment, the differential receiver includes two signal input nodes and a plurality of transistors, and two signal output nodes. The pair of cross-coupled signal conditioning devices are coupled to the transistors and function to reduce voltage swing between the two output nodes, thereby keeping the transistors in a saturation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.