Lightspeed Semiconductor Corporation
23Patents
0Active
23Granted
33Portfolio score
Filing activity: Sep 10, 1996 → Aug 12, 2003
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6242767A | Asic routing architecture | Electricity | 103 | Expired |
| US6133582A | Methods and apparatuses for binning partially completed integrated circuits based upon test results | Electricity | 70 | Expired |
| US6613611B1 | ASIC routing architecture with variable number of custom masks | Electricity | 67 | Expired |
| US6014038A | Function block architecture for gate array | Electricity | 34 | Expired |
| US6223313A | Method and apparatus for controlling and observing data in a logic block-based asic | Physics | 23 | Expired |
| US6861867B2 | Method and apparatus for built-in self-test of logic circuits with multiple clock domains | Physics | 23 | Expired |
| US6399400B1 | Methods and apparatuses for binning partially completed integrated circuits based upon test results | Electricity | 18 | Expired |
| US6694491B1 | Programmable logic array embedded in mask-programmed ASIC | Electricity | 15 | Expired |
| US6611932B2 | Method and apparatus for controlling and observing data in a logic block-based ASIC | Physics | 12 | Expired |
| US6696856B1 | Function block architecture with variable drive strengths | Electricity | 12 | Expired |
| US6769109B2 | Programmable logic array embedded in mask-programmed ASIC | Electricity | 10 | Expired |
| US6498361B1 | Design information memory for configurable integrated circuits | Electricity | 10 | Expired |
| US6954917B2 | Function block architecture for gate array and method for forming an asic | Electricity | 10 | Expired |
| US6150807A | Integrated circuit architecture having an array of test cells providing full controllability for automatic circuit verification | Physics | 10 | Expired |
| US6770949B1 | One-mask customizable phase-locked loop | Electricity | 7 | Expired |
| US5872448A | Integrated circuit architecture having an array of test cells providing full controlability for automatic circuit verification | Physics | 6 | Expired |
| US6690194B1 | Function block architecture for gate array | Electricity | 6 | Expired |
| US6885043B2 | ASIC routing architecture | Electricity | 6 | Expired |
| US7055125B2 | Depopulated programmable logic array | Electricity | 5 | Expired |
| US7102237B1 | ASIC customization with predefined via mask | Electricity | 4 | Expired |
| US7043713B2 | Implementing programmable logic array embedded in mask-programmed ASIC | Electricity | 3 | Expired |
| US6804812B2 | Depopulated programmable logic array | Electricity | 2 | Expired |
| US6680626B2 | High speed differential receiver | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.