Read lock miss control and queue management

US6681300B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Gilbert M. Wolrich · Framingham, US
• Daniel Cutter · Townsend, US
• William R. Wheeler · Southborough, US
• Matthew J. Adiletta · Bolton, US
• Debra Bernstein · Sudbury, US

Key dates

• Filing date: Oct 2, 2001
• Grant date: Jan 20, 2004
• Expiry date: Oct 2, 2021

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/52
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Managing memory access to random access memory includes fetching a read lock memory reference request and placing the read lock memory reference request at the end of a read lock miss queue if the read lock memory reference request is requesting access to an unlocked memory location and the read lock miss queue contains at least one read lock memory reference request.