Pillar connections for semiconductor chips and method of manufacture
US6681982B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 2002 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Jun 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip chip interconnect system comprises and elongated pillar comprising two elongated portions, one portion including copper and another portion including solder. The portion including copper is in contact with the semiconductor chip and has a length preferably of more than 55 microns to reduce the effect of &agr; particles from the solder from affecting electronic devices on the chip. The total length of the pillar is preferably in the range of 80 to 120 microns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.