Trench structure for semiconductor devices
US6683363B2 · kind B2 · utility
32Cited by
13References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 3, 2001 |
| Grant date | Jan 27, 2004 |
| Priority date | — |
| Expiry date | Jul 3, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS trench structure integrated with a semiconductor device for enhancing the breakdown characteristics of the semiconductor device, comprises a semiconductor substrate, a plurality of parallel trenches formed in the semiconductor substrate, a peripheral trench formed in the semiconductor substrate and spaced from and at least partially surrounding the parallel trenches, a dielectric material lining the trenches, and a conductive material substantially filling the dielectric-lined trenches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.