Compliant wafer-level packaging devices and methods of fabrication
US6690081B2 · kind B2 · utility
28Cited by
7References
54Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2001 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Nov 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Devices and method of fabrication thereof are disclosed. A representative device includes one or more lead packages. The lead packages include a substrate including a plurality of die pads, an overcoat polymer layer, a plurality of sacrificial polymer layers disposed between the substrate and the overcoat polymer layer, and a plurality of leads. Each lead is disposed upon the overcoat polymer layer having a first portion disposed upon a die pad. The sacrificial polymer layer can be removed to form one or more air-gaps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.