Use of silicide blocking layer to create high valued resistor and diode for sub-1V bandgap
US6690083B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2000 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Jun 1, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/47
Abstract
The present invention is drawn to a method and a system for creating a sub-1V bandgap reference (BGR) circuit. In particular, a sub-1V BGR circuit is formed comprising a shallow trench isolation (STI) region and a poly silicon region above said STI region. The poly silicon region is formed having a first doped region longer than a second doped region. The poly silicon region as one single structure is adapted to function as a resistor and a diode coupled in series, said structure adapted to generate currents in a feedback loop to generate a BGR voltage. In forming the sub-1V BGR circuit, a silicide blocking mask (already available in the process flow for forming a standard semiconductor device) is used to prevent spacer oxide from forming above the center portion of the poly silicon region. In turn, silicide contacts can be formed away from the center portion of the poly silicon region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.