Algorithm dynamic reference programming
US6690602B1 · kind B1 · utility
49Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2002 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Apr 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of cycling dual bit flash memory arrays having a plurality of dual bit flash memory cells arranged in a plurality of sectors with each sector having an associated reference array that have dual bit flash memory cells that are cycled with the plurality of dual bit flash memory cells in the sectors. The dual bit flash memory cells in the associated reference array are then programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.