Circuit board design aiding
US6691296B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 1999 |
| Grant date | Feb 10, 2004 |
| Priority date | — |
| Expiry date | Feb 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10689
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A net detecting unit detects a set of component terminal interconnection information showing a critical net from a component terminal interconnection information list. A conductor detecting unit detects a conductor corresponding to the critical net. A component detecting unit detects two components from the set of component terminal interconnection information. A terminal detecting unit detects a power and/or ground terminal of each of the detected components. A power/ground layer detecting unit detects at least one layer, among power and ground layers, to which the detected power and/or ground terminals are connected. A layer detecting unit specifies a layer, among the detected layers, that is nearest to a signal layer on which the conductor is placed. A prohibition area generating unit generates a via prohibition area on the specified layer. As a result, vias are placed on the specified layer, avoiding the via prohibition area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.