Method system and apparatus for instruction tracing with out of order processors
US6694427B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2000 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Apr 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3636
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, system and apparatus for instruction tracing with out of order speculative processors. With the present invention, information corresponding to the state of an instruction cache and a data cache is stored in a trace storage device along with information corresponding to instructions fetched by the processor. When a cache load is necessary, updated cache information is stored in the trace storage device. Thereby, the state of the cache at all times during fetching of instructions may be known from the information stored in the trace storage device. Additionally, the particular instructions fetched is known from the fetched instructions information stored in the trace storage device. Hence the instruction stream may be reconstructed from the information stored in the trace storage device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.