Method and apparatus for dynamically testing electrical interconnect
US6694464B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2000 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Jan 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A hardware emulation system is disclosed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board. The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, and a plurality of reprogrammable interconnect devices. The logic devices and interconnect devices are interconnected together such that multiple design signals share common input/output pins and circuit board traces. A logic analyzer for a hardware emulation system is also disclosed. The logic circuits necessary for executing logic analyzer functions is programmed into the programmable resources in the logic chips of the emulation system. A method for dynamically testing the interconnect between integrated circuits is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.