Method of manufacture of a multi-layered substrate with a thin single crystalline layer and a versatile sacrificial layer
US6696352B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2002 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Jul 24, 2022 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2201/019
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A process for producing a multilayered substrate. In a first step, an adhesive layer is applied to a surface of a support substrate. Then a device substrate is placed into contact with the adhesive surface. Then the adhesive is cured. Then the device substrate is thinned. The device substrate has a hydrogen trap layer inside. The trap layer is formed by ion implantation through a face surface of the device substrate. The adhesive is chosen from compounds that release hydrogen upon curing. Thinning of the device substrate is performed by cleavage along a fragile layer of hydrogen microbubbles. The microbubble layer is formed through gettering of hydrogen released from the adhesive layer upon curing onto the trap layer and evolving the trapped hydrogen into the microbubbles. The substrates are preferably silicon single crystalline wafers and the adhesive is preferably hydrogen-silsesquioxane. The process is preferentially used to manufacture silicon-on-adhesive wafers for microelectromechanical systems, multilayer CMOS, and optoelectronic applications. The layered wafers have one or more thin single crystalline device layers and one or more sacrificial/spacer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.