Overlay inspection apparatus for semiconductor substrate and method thereof
US6697698B2 · kind B2 · utility
7Cited by
4References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2002 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Jul 17, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70633
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A system for manufacturing a semiconductor device which predicts a difference in registration error between a circuit pattern and an overlay mark from a pattern dimension, illumination conditions and the wave aberration of an exposure lens, feeds a correction value based on the predicted difference back to an exposure device and modifies an overlay inspection data control limit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.