Method of fabricating a bipolar transistor using selective epitaxially grown SiGe base layer
US6699765B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2002 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Aug 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/177
Abstract
Embodiments of a bipolar transistor are disclosed, along with methods for making the transistor. An exemplary transistor includes a collector region in a semiconductor substrate, a base layer overlying the collector region and bound by a field oxide layer, a dielectric isolation layer overlying the base layer, and an emitter structure overlying the dielectric isolation layer and contacting the base layer through a central aperture in the dielectric layer. The transistor may be a heterojunction bipolar transistor with the base layer formed of a selectively grown silicon germanium alloy. A dielectric spacer may be formed adjacent the emitter structure and over a portion of the base layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.