Method of forming active devices of different gatelengths using lithographic printed gate images of same length

US6703312B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• John W. Golz · Manassas, US
• Babar A. Khan · Ossining, US
• Joyce C. Liu · Carmel, US
• Christopher J. Waskiewicz · Rexford, US
• Teresa J. Wu · Rexford, US

Key dates

• Filing date: May 17, 2002
• Grant date: Mar 9, 2004
• Expiry date: May 17, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0147

Abstract

As disclosed herein, a method is provided for simultaneously patterning features having a first width in a first portion such as a logic portion of an integrated circuit, and having a second width in a second portion such as an array portion of an integrated circuit. The method includes depositing a feature layer over a substrate and a hardmask material layer thereover. Photoresist patterns are then formed in the first and second portions with a critical dimension mask, and are then used to etch the hardmask material layer into hardmask patterns. Sidewall spacers are provided on sidewalls of the hardmask patterns in the second portion. Then, the feature layer is simultaneously etched in both first and second portions, using the hardmask patterns in the first portion to define features having a first width, and using the hardmask patterns and the sidewall spacers in the second portion to define features having a second width.