Electronic package design with improved power delivery performance
US6703697B2 · kind B2 · utility
19Cited by
5References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2001 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Dec 7, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/12396
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic package with improved power delivery performance, lowering the impedance associated with the power delivery. The electronic package includes an integrated circuit die mounted on the substrate of the electronic package and decoupling capacitors placed underneath the substrate. The package further includes stand-offs placed underneath the substrate, sized for maintaining a distance between the capacitors and another substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.