Error detection and correction method and apparatus in a magnetoresistive random access memory
US6704230B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Jun 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method and apparatus for reducing data errors in a magneto-resistive random access memory (MRAM). According to the disclosed method, data bits and associated error correction code (ECC) check bits are stored into a storage area. Thereafter, the data bits and ECC check bits are read out and any errors are detected and corrected. A data refresh is then initiated based on a count and data bits and associated ECC check bits stored in the storage area are then refreshed by accessing the stored data bits and the associated ECC check bits, and ultimately by checking, correcting and restoring the data bits and the ECC check bits to the storage area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.