Method for decoupling capacitor optimization for a temperature sensor design
US6704680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2002 |
| Grant date | Mar 9, 2004 |
| Priority date | — |
| Expiry date | Apr 7, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for optimizing a decoupling capacitance for an on-chip temperature sensor is provided. A representative power supply waveform having noise is input into a simulation of the on-chip temperature sensor; a difference between a temperature representative input and a temperature dependent output of the on-chip temperature sensor is determined; and an amount of the decoupling capacitance is adjusted until the difference falls below a pre-selected value. A computer system for optimizing a decoupling capacitance for an on-chip temperature sensor is also provided. A computer-readable medium having recorded thereon instructions executable by a processor for optimizing a decoupling capacitance for an on-chip temperature sensor is further provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.