Method of trench sidewall enhancement
US6706586B1 · kind B1 · utility
4Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2002 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Oct 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a high aspect ratio deep trench having smooth sidewalls in a semiconductor substrate comprising a first etching step of contacting the substrate in which the deep trench is to be etched with either NF3 gas or SF6 gas in the absence of the other, followed by a second etching step with the etching gas of either NF3 or SF6 which ever one was not used in the first etching step, and alternating the first and second etching steps until the desired high aspect ratio trench depth is reached.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.