Lateral high-breakdown-voltage transistor
US6707104B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2002 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Oct 23, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A lateral high-breakdown-voltage transistor comprises an n− drain region and an n+ source region formed in a p− silicon substrate, separated from each other, a gate electrode formed on a channel, insulated from the substrate, an n+ drain contact region formed in the drain region, drain wiring electrically connected to the drain region via the drain contact region, a p+ substrate contact region formed in contact with the source region, and source wiring electrically connected to the source region and also connected to the semiconductor layer via the substrate contact region. The transistor is characterized in that the substrate contact regions have respective portions made to be in contact with the source wiring, and accordingly laterally extend from inside the contact surface of the source wiring to outside the contact surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.