Time-sensitive-packet jitter and latency minimization on a shared data link
US6707821B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2000 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Jul 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/50
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method are disclosed for interleaving time-critical packets and lower-priority packets onto a common data link. A packet arrival prediction mechanism predicts when a time-critical packet is expected to arrive. When transmission of a waiting lower-priority packet might cause a substantial delay in the expected time-critical packet's transmission, the lower-priority packet is parked until it can be transmitted without interfering with a time-critical packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.