Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic
US6708325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2000 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | May 31, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer implemented method for automatically compiling a computer program written in a high level programming language into an intermediate data structure. The data structure is analyzed to identify critical blocks of logic, which can be implemented as an application specific integrated circuit (ASIC), to improve overall performance. The critical blocks of logic are transformed into new equivalent logic with maximal data parallelism. The parallelized logic is then translated into a Boolean gate representation, which is suitable for implementation on an ASIC. The ASIC may be coupled with a generic microprocessor via custom instruction for the microprocessor. The original computer program is then compiled into object code with the new expanded target instruction set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.