Flip-chip die for joining with a flip-chip substrate
US6710459B2 · kind B2 · utility
3Cited by
4References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 2, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Aug 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flip-chip package board having signal bump pads, power bump pads and ground bump pads grouped together into respective inner bump pad rows and sequentially laid down on one side of the group of core bump pads so that the power bump pad row and the ground bump pad row alternate between signal bump pad rows. In addition, the outer bump pads are positioned in such a way that the shortest possible separation between neighboring outer bump pads is used. This invention also provides a flip chip having an active surface with a plurality of die pads thereon that corresponds in position to the bump pads on the flip-chip package board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.