Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell
US6711054B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 19, 2002 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Nov 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data are generated based on additional write data input to data latch circuits (DLR and DLL) and data read from memory cells (MC) to program non-volatile memory cells in a write state into the same write state and to program non-volatile memory cells in an erase state into a write state indicated by the additional write data. The generated data are latched in the data latch circuits to perform a logical synthesis process for additional writing. Even after the additional write operation, the logically synthesized data remain in the data latch circuits, and the latched data can be reused against abnormality in writing. This eliminates the need for receiving write data again from the outside when the additional write operation is to be retried.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.