Data bus sense amplifier circuit
US6711079B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 18, 2001 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | May 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The inventions relate to a data bus sense amplifier circuit. A switching unit includes a PMOS transistor which serves as an input terminal for a sense amp enable signal for maintaining a power supply voltage precharge state of a data bus sense amp. This arrangement allows for reduced leakage current between the switching unit and a ground terminal, and a sensed width by self-asymmetry during a precharge period is decreased, to easily invert a wanted data in a read operation. In addition, the sense amp enable signal is a pulse type for facilitating a high speed sensing operation in a high pulse operation, thereby improving a speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.