Stacking of multilayer modules
US6717061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2001 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Sep 7, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24917
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Each multilayer module of a plurality of multilayer modules has a plurality of layers wherein each layer has a substrate therein. The plurality of multilayer modules includes a first multilayer module including a first layer and a second multilayer module including a second layer each having a top side and bottom side. The first layer and second layer each includes a substrate, at least one electronic element, and a plurality of electrically-conductive traces. The plurality of multilayer modules further includes a heat-separating layer disposed between the top side of the first layer and the bottom side of the second layer. The first multilayer module is adhered to the second multilayer module and the first multilayer module can be detached from the second multilayer module by applying heat to the heat-separating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.