Disabling flash memory to protect memory contents
US6717208B2 · kind B2 · utility
3Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2002 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Jun 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
Disabling flash memory cells to protect their contents, and thus essentially transforming them into read-only memory (ROM) cells, is disclosed. A gate mask and an implant code mask are positioned over a given flash memory cell. A field oxide layer is then fabricated within a substrate layer of the cell through the masks as logically and'ed together. By such fabrication, the flash memory cell is at least partially disabled. The masks are preferably a gate mask and an implant code mask, as these masks typically are already existing and available for use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.