Memory access latency hiding with hint buffer
US6718440B2 · kind B2 · utility
128Cited by
9References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2001 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Apr 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A request hint is issued prior to or while identifying whether requested data and/or one or more instructions are in a first memory. A second memory is accessed to fetch data and/or one or more instructions in response to the request hint. The data and/or instruction(s) accessed from the second memory are stored in a buffer. If the requested data and/or instruction(s) are not in the first memory, the data and/or instruction(s) are returned from the buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.