Method and apparatus for preventing and recovering from TLB corruption by soft error
US6718494B1 · kind B1 · utility
26Cited by
3References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Jun 21, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A detection and recovery mechanism is herein disclosed for soft errors corrupting TLB data. The mechanism works with a hardware page walker (HPW) and instruction steering control mechanisms in a processor to provide soft error recovery in the TLB arrays and latches. Through use of the disclosed detection and recovery mechanism, efficient and robust protection from silent data corruption is provided without requiring more expensive built-in redundancy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.