Method of fabricating an embedded DRAM for metal-insulator-metal (MIM) capacitor structure
US6720232B1 · kind B1 · utility
98Cited by
10References
33Claims
0Family size
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Key dates
| Filing date | Apr 10, 2003 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Apr 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
A method for fabricating a metal-insulator-metal capacitor in an embedded DRAM process is described. A plurality of contact plugs are provided through an insulating layer to semiconductor device structures in a substrate wherein the contact plugs are formed in a logic area of the substrate and in a memory area of the substrate and providing node contact plugs to node contact regions within the substrate in the memory area. Thereafter, capacitors are fabricated in a twisted trench in a self-aligned copper process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.