LCD testing method
US6720791B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2001 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Oct 6, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/006
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An LCD panel testing method. The method comprises forming jump lines in a predetermined region on the substrate between the signal lines via mask design when forming TFT LCD arrays, and thus forming a plurality of signal-line groups each with two signal lines coupled by the jump lines. Thereupon, an array tester sequentially tests two pixels corresponding to the signal lines in the signal groups. If one of the feedback signals from the signal groups does not meet a predetermined standard, it is determined that one or both pixels in the signal group are defective. The defective pixel or pixels are then identified using an electronic microscope to test two pixels at the same time. In this way, the number of probe pins and tests performed is halved. The probe pin size is also thus less restrictive due to larger probe pin intervals. Consequently, yield is greatly increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.