Bit line control and sense amplification for TCCT-based memory cells
US6721220B2 · kind B2 · utility
15Cited by
4References
53Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2002 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Jul 5, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit and a method are provided for facilitating control of bit lines in preparation for, or during, sense amplification of data signals from thinly capacitively-coupled thyristor (“TCCT”)-based memory cells. In accordance with a specific embodiment, a circuit and method are designed, among other things, to effectively minimize power consumption by memory cells and to increase speed and reliability of sense amplification. In another specific embodiment, the circuit and method are directed to TCCT-based memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.