Method for bus capacitance reduction
US6721860B2 · kind B2 · utility
64Cited by
18References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 13, 2001 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Aug 31, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data bus capacitance is reduced by decoupling unaccessed memory circuits from a data bus during data transfers to or from other memory circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.